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- いいね！0
Dennis Brophy
@dennisbrophy
RT @ytrivedi: Verification panel in Pavilion at #48DAC #snps #semiEDA http://lockerz.com/s/108626523
2011-06-08 06:32:26
Yatin Trivedi
@ytrivedi
Audience taking in advice at the verification panel in Pavilion at #48DAC #snps #semiEDA http://lockerz.com/s/108627056
2011-06-08 06:31:16
Dennis Brophy
@dennisbrophy
Goodenough from ARM, it is not methodology, it is metrics to improve verification productivity #48DAC
2011-06-08 06:30:56
Synopsys
@Synopsys
Conversation Central show “Driving Chip Design at 20nm and Beyond” is at 3pm with Ching-Cheng Chai from TSMC http://bit.ly/iIgQZr #48DAC
2011-06-08 06:30:11
Yatin Trivedi
@ytrivedi
Verification panel in Pavilion at #48DAC #snps #semiEDA http://lockerz.com/s/108626523
2011-06-08 06:28:40
Dennis Brophy
@dennisbrophy
Jim Miller says it is not more cycles that help- #Mentor verification message: "End endless verification" #48DAC
2011-06-08 06:28:06
JL Gray
@jlgray
My #48dac proposal: hold a track where PPT slides are forbidden! Focus on discussing ideas without relying on PPT as a crutch.
2011-06-08 06:27:45
Dennis Brophy
@dennisbrophy
Jim Miller from AMD says their EDA partners are not keeping up. #48DAC panel
2011-06-08 06:26:28
JL Gray
@jlgray
Amazon presents tutorial on effective use of the Cloud as part of mgmt day at 4pm in 33ab #48dac
2011-06-08 06:19:47
Dennis Brophy
@dennisbrophy
ARM's Goodenough looking at Simulation v. Emulation v. FPGA ROI at #48DAC Panel
2011-06-08 06:19:27
Peggy Aycinena
@paycinena
Des&Syn BioCircuits - Cal's Arkin talkin fast re Gene Expression Engr & bio-fabing standard parts - Don't like bio? Don't show up #48dac
2011-06-08 06:19:15
jbdavid
@jbdavid
Cloud computing in ic design much easier to secure and manage with internal cloud. Requires large company scale though. #48dac verif panel
2011-06-08 06:19:07
Dennis Brophy
@dennisbrophy
RT @lorikate: LKS: #48DAC panel: verification: what's in ur wallet. #ARM manages scheduled risk vs. Balanced risk http://yfrog.com/h038nhjj
2011-06-08 06:16:17
Arm
@Arm
LKS: #48DAC panel: verification: what's in ur wallet. #ARM manages scheduled risk vs. Balanced risk http://yfrog.com/h038nhjj
2011-06-08 06:14:35
Lori Kate Smith
@lorikate
LKS: #48DAC panel: verification: what's in ur wallet. #ARM manages scheduled risk vs. Balanced risk http://yfrog.com/h038nhjj
2011-06-08 06:14:35
はぎわら
@hagihome
RT @EDAExpress: GPUを使ったシミュレーション高速化のRocketSimは、最低でも10倍、最高50倍近い高速化を実現するようだ。デザイン規模に応じて使うGPUの個数を変える。その分割方法は特許技術。マシンとソフトのセットで10ライセンス単位で販売しているようだ。 #48dac
2011-06-08 06:05:37
Synopsys
@Synopsys
What is the formal IEEE standard name for IP-XACT? #snps #48DAC
2011-06-08 06:00:29
Peggy Aycinena
@paycinena
CEDA Lunch - Intel's S.Borkar lays out roadmap 4 scaling power/energy down while scaling perf/density up - slides w/b on CEDA site #48dac
2011-06-08 05:59:05
Arm
@Arm
LKS: visit Forte to see synthesizable SystemC AHB bus interface with TLM2 demo http://yfrog.com/gzq2rrsfj #48DAC booth 3417
2011-06-08 05:54:33
Lori Kate Smith
@lorikate
LKS: visit Forte to see synthesizable SystemC AHB bus interface with TLM2 demo http://yfrog.com/gzq2rrsfj #48DAC booth 3417
2011-06-08 05:54:33
Synopsys
@Synopsys
Here’s help: Why wait for RTL, start your SW development now w/ SNPS and ARM CORTEX A9 VP #48DAC ARM Systems demo @Synopsys booth
2011-06-08 05:48:01
Lori Kate Smith
@lorikate
LKS: lots of #ARM training from Doulos #48DAC booth 3012 http://yfrog.com/cacgwpuj #EDA
2011-06-08 05:40:39
Arm
@Arm
LKS: lots of #ARM training from Doulos #48DAC booth 3012 http://yfrog.com/cacgwpuj #EDA
2011-06-08 05:40:39