Time to relax. RT @dave_59: #dvcon is done. Time to go home
2011-03-04 10:53:51#DVCon Truth or Consequences - http://bit.ly/i048NO (Thanks Peggy!)
2011-03-04 10:02:04Actually, there is still more. Good info from Tutorials today. RT @Vengineer #DvConバブルが終わって、静かになるだろうに?
2011-03-04 09:18:46RT @jlgray: Big shout out to Kathy Embler and the rest of the MP Associates team for putting on a great #dvcon this year! Thanks, Kathy!
2011-03-04 08:16:18Chandramouli at #DVCon tutorial says inFact is like driving a Ferrari down 101 (hwy near conference) Is getting 50x plus.
2011-03-04 08:16:15#DVCon "Advanced Verification Technologies in the Real World" tutorial is being video recorded. Available later for non-attendees.
2011-03-04 07:47:38@tomacadence @dave_59 I shouldn't make an excuse. Sorry for talking and hopefully the apology can be forwarded on to the speakers. #dvcon
2011-03-04 07:29:46Full house at the afternoon Advanced #Verification Technologies in the Real World #DVCon tutorial. http://yfrog.com/h8z9kaej
2011-03-04 07:15:31Add my voice to the chorus of tweets praising this year's #DVCon - a success on every level - talks, panels, tutorials, exhibits & more #eda
2011-03-04 07:00:37Why #UVM is important for the Semiconductor community? http://pulsene.ws/13RuZ By @srinicvs at #dvcon
2011-03-04 06:53:573 tables talked nonstop all through the panel - some engineers sure are socially clueless @dave_59 #dvcon lunch - too much background noise
2011-03-04 06:53:09Congrats @techmiser RT @dvcon: Best paper of #DVCon is awarded to Adam Erickson, Mentor, "Are Macros in OVM and VMM Evil? #eda
2011-03-04 06:29:36@qualcomm wants all #eda vendors to have compatible implementation of the standard HDL #dvcon #msdv
2011-03-04 06:19:04Spectral coupling / noise performance is becoming driving issue for time-to-market for RF-SOC #dvcon #msdv test 1st silicon, or over-design
2011-03-04 06:14:33#dvcon Micron wants to use SV assertions to instrument mixed signal fast-spice simulations. #msdv
2011-03-04 06:06:57Audience: Timing performance is tough challenge in mixed signal AMS languages don't support annotation #dvcon #msdv
2011-03-04 05:59:21Mentor: better instrumentation for AMS sim, different debug needs, control of simulation parameters 3 key directions #dvcon #msdv
2011-03-04 05:55:51Mentor looking to add tools that work and get out of the way. #dvcon #msdv
2011-03-04 05:53:00Cadence looking to help analog teams automate the verification process, better tools & right languages #dvcon #msdv
2011-03-04 05:51:58@qualcomm modeling flow starts w waterboarding designer to get the behavioral spec. designer held responsible 4 correct spec. #dvcon #msdv
2011-03-04 05:49:19It may be an analog world, but it's not getting any respect at the #dvcon lunch. Too much background noise.
2011-03-04 05:47:48RT @karenbartleson: Best paper of #DVCon: adam Erickson, Mentor, "Are Macros in OVM and VMM Evil?" #eda #snps
2011-03-04 05:45:44Medtronic uses same verification bench for model & xstr netlist to prove equivalence #dvcon #msdv
2011-03-04 05:45:35