Hot Chips 24 のTweetまとめ

Hot Chips 24: http://www.hotchips.org/ FUJITSU SPARC64 X, Oracle SPARC T5, IBM POWER7+/zNext, Intel E5 2600の発表など。 続きを読む
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Mike Demler @MikeDemler

Great start to #HotChips24: excellent signage to find parking & auditorium. Session on The Evolution of Mobile SoC Programming starting off.

2012-08-28 01:41:48
Mike Demler @MikeDemler

#HotChips24 Neil Trevett 4 @TheKhronosGroup: OpenCL accomodates "Dark silicon". Dedicated h/w units only turned on when needed 2 save pwr

2012-08-28 02:21:15
Mike Demler @MikeDemler

#HotChips24 Message from session on The Evolution of Mobile SoC Programming - need for S/W-H/W co-design! Mobile OS lag SoC capabilities

2012-08-28 04:26:51
Mike Demler @MikeDemler

#HotChips24 Bryan Black (AMD): process scaling will stop supporting diverse IC functionality - will need #3DICs. Heard same thing at 1um.

2012-08-28 08:40:29
Patrick Thibodeau @pthibodeau11

IBM may be running world's fastest commercial processor at 5.5-GHz http://t.co/zbjIFBiv via @computerworld #ibm, #servers #hotchips

2012-08-28 23:45:32
nakajima yumi @nakajima_yumi

先端プロセサの発表が盛りだくさん - Hot Chips 24が開幕 http://t.co/VqDQPIFP POWER7+、Xeon E5 2600、X-Gene、SPARC64 X、SPARC T5、zNextと勢揃い。 #mynavinews

2012-08-28 23:52:57
Daniel Bowers @Daniel_Bowers

#HotChips24 keynotes include one tomorrow from Pat Gelsinger.

2012-08-29 00:42:29
rahul garg @codedivine

Looking forward to tweets from people at #hotchips today. AMD Jaguar, Intel MIC and so much more!

2012-08-29 00:47:11
Daniel Bowers @Daniel_Bowers

Sanjeev Jahagirdar, Intel: Ivy Bridge core could operate at lower voltage, it's cache that defines the lower limit of voltage. #HotChips24

2012-08-29 01:12:19
Daniel Bowers @Daniel_Bowers

Jeff Rupley of AMD comparing Jaguar core layout to Bobcat http://t.co/IXR5Xwzh #HotChips24

2012-08-29 01:39:46
Daniel Bowers @Daniel_Bowers

AMD: Internal simulations show Jaguar with 15% IPC improvement, 10% frequency improvement over Bobcat #HotChips24

2012-08-29 01:41:23
Daniel Bowers @Daniel_Bowers

"Suds" Sudhakar from MIPS: "The top-level block diagram for all superscalar, OoO processors looks about the same" #HotChips24

2012-08-29 01:59:43
Thomas Ryan @UncheckedError

AMD let the new ‘Cat’ out of the bag with the Jaguar core | SemiAccurate http://t.co/QiEghI9e via @semiaccurate #Hotchips #AMD #AVX #HSA

2012-08-29 03:12:35
Daniel Bowers @Daniel_Bowers

David Riddoch of @solarflare10g: End-users don't use FPGAs for acceleration because implementation is too hard #HotChips24

2012-08-29 03:27:59
Daniel Bowers @Daniel_Bowers

SolarFlare showing how online traders cut latency with FPGA-enhanced NICs. "Traders have lots of money to spend" #HotChips24

2012-08-29 03:39:52
Daniel Bowers @Daniel_Bowers

Diego Crupnicoff of @MellanoxTech presenting. Impressive: Diego sits on some Ethernet, FC, and Infiniband standards bodies. #HotChips24

2012-08-29 03:53:41
Daniel Bowers @Daniel_Bowers

Mellanox is describing how SwitchX chip decomposes packets. I'll need help from @etherealmind just to decompose the acronyms. #HotChips24

2012-08-29 04:02:32
Anne Johnson @annejohn

Infrastructure: watch the #HotChips24 tag - Mellanox, SolarFlare, AMD, MIPS, ADI Toshiba, Xilinx http://t.co/e16yQ0MF

2012-08-29 04:51:24
ExtremeTech @ExtremeTech

AMD details Steamroller CPU architecture: Refined Piledriver with dynamic L2 cache http://t.co/sC9WC5hm #hotchips

2012-08-29 05:34:04
Daniel Bowers @Daniel_Bowers

Steve Papermaster, AMD: Computer use is no longer a distinct activity for people; it's integrated into how we live our lives #HotChips24

2012-08-29 05:49:07
Daniel Bowers @Daniel_Bowers

CTO from AMD talking about http://t.co/P8bgnlwH as an AMD effort to enable GPU compute in the data center #HotChips24

2012-08-29 06:02:37
Daniel Bowers @Daniel_Bowers

AMD's Papermaster: Steamroller has completed design phase; will be shipping in systems next year #HotChips24

2012-08-29 06:09:34
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